In a manufacturing process of a semiconductor device, a dual damascene method has been widely used to form wiring trenches or connection holes (see, for example, Japanese Patent Laid-open Application No. 2002-83869).
Meanwhile, with the miniaturization of the semiconductor device, a parasitic capacitance of an interlayer dielectric becomes an important factor for improving a wiring performance, and a low dielectric constant material (low-k material) is used to form the interlayer dielectric. As the low-k material for forming the interlayer dielectric, a material having an alkyl group such as a methyl group as an end group is generally utilized.
However, in the above-mentioned conventional damascene process, the interlayer dielectric made of the low-k material may be damaged during an etching process or a resist film removing process. Such damage causes an increase of a dielectric constant of the interlayer dielectric, thus diminishing or impairing the effect of using the low-k material.
To recover such damage, Japanese Patent Laid-open Application No. 2006-049798 discloses a method of performing a silylation process after performing the etching or resist film removing process. The silylation process reforms a surface of a damaged portion by using a silylizing agent so that an end group thereof becomes an alkyl group such as a methyl group.
In this silylation process, a pressure of a silylizing gas is set to be high and a processing time at that pressure is set to be long in order to allow a silylation reaction to progress sufficiently.
However, if the pressure of the silylizing gas is set high and the processing time at that pressure is set long, it takes time until the gas pressure reaches the target pressure, and a long period of time is consumed for the silylation process. As a result, a throughput deteriorates, and the amount of the silylizing gas consumed increases.
Moreover, if a processing temperature is set to be high so as to facilitate the silylation reaction, it takes time until the target temperature is obtained, whereby the throughput is further reduced. Besides, the high temperature accompanies a likelihood of Cu oxidation as well.